A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

H. Kimura, K. Pagiamtzis, A. Sheikholeslami and T. Hanyu, “A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices,” in IEEE International Symposium on Multiple-Valued Logic (ISMVL), May 2004, pp. 340–345.

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Abstract

This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.